如何在linux中打败core i3 / i7中的硬件预取器

我试图find一种方法来击败H / W预取器来检测stream模式,并以随机顺序访问4KB数据,以使其不被H / W预取器检测和预取。

最初,我打算以随机模式访问所有偶数索引数据,因为H / W预取器总是预取下一个caching行(所以当我访问偶数索引时,下一个奇数索引数据已经被预取)。

我编写了代码以随机模式访问所有偶数索引数据,但是结果表明预取器检测到模式(不知道怎么做?没有固定的跨度,都是随机跨度)

我正在调查原因 – 为什么发生这种情况,然后我在英特尔find了这篇文章; https://software.intel.com/en-us/forums/topic/473493

根据John D. McCalpin博士的博士“Bandwidth博士,

在“Intel 64和IA-32架构优化参考手册”(文档248966-028,2013年7月)的第2.2.5.4节中,它指出,

stream媒体预取器“[d]检测和维护多达32个数据访问stream,对于每个4K字节的页面,可以保持一个前向和一个后向stream。

这意味着L2硬件预取器跟踪最近访问的16个4KiB页面,并记住足够的这些页面的访问模式以跟踪一个前向stream和一个后向stream。 因此,要使用“随机”提取来击败L2stream转预取器,只需确保您访问超过15个其他4个KiB页面,然后再对先前引用的页面进行第二次引用。 所以一个“随机”取序列可能由16个以上的4个KiB页码随机排列组成,每个页面内有一个随机偏移量。 (我通常在我的排列列表中使用至less32页。)

所以它意味着在访问相同的4KB页面的两个不同的随机索引之间,我们需要访问至less16个4KB页面来击败H / W预取器。

我已经实现了John D. McCalpin所提出的概念,然而结果再一次显示了h / w预取器没有被击败。 它能够检测某些模式和预取数据(请参阅示例输出)。 我从20-40页的4KB页面访问页数不一样,但结果没有改进/改变。

这是我的代码:

#define _GNU_SOURCE /* See feature_test_macros(7) */ #include <stdlib.h> #include <stdio.h> #include <unistd.h> #include <sched.h> #ifndef _POSIX_THREAD_PROCESS_SHARED #error This system does not support process shared mutex #endif #define MAX_COUNT 3000 #define INDEX (40*1024) // size of DUMMY 40 4KB pages inline void clflush(volatile void *p) { asm volatile ("clflush (%0)" :: "r"(p)); } unsigned long probe(char *adrs) { volatile unsigned long time; asm __volatile__ ( " mfence \n" " lfence \n" " rdtsc \n" " lfence \n" " movl %%eax, %%esi \n" " movl (%1), %%eax \n" " lfence \n" " rdtsc \n" " subl %%esi, %%eax \n" " clflush 0(%1) \n" : "=a" (time) : "c" (adrs) : "%esi", "%edx"); return time; } void shuffle(int *arr, size_t n) { if (n > 1) { size_t i; srand(time(NULL)); for (i = 0; i < n - 1; i++) { size_t j = i + rand() / (RAND_MAX / (n - i) + 1); int t = arr[j]; arr[j] = arr[i]; arr[i] = t; } } } static const int DATA[1024]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255,256,257,258,259,260,261,262,263,264,265,266,267,268,269,270,271,272,273,274,275,276,277,278,279,280,281,282,283,284,285,286,287,288,289,290,291,292,293,294,295,296,297,298,299,300,301,302,303,304,305,306,307,308,309,310,311,312,313,314,315,316,317,318,319,320,321,322,323,324,325,326,327,328,329,330,331,332,333,334,335,336,337,338,339,340,341,342,343,344,345,346,347,348,349,350,351,352,353,354,355,356,357,358,359,360,361,362,363,364,365,366,367,368,369,370,371,372,373,374,375,376,377,378,379,380,381,382,383,384,385,386,387,388,389,390,391,392,393,394,395,396,397,398,399,400,401,402,403,404,405,406,407,408,409,410,411,412,413,414,415,416,417,418,419,420,421,422,423,424,425,426,427,428,429,430,431,432,433,434,435,436,437,438,439,440,441,442,443,444,445,446,447,448,449,450,451,452,453,454,455,456,457,458,459,460,461,462,463,464,465,466,467,468,469,470,471,472,473,474,475,476,477,478,479,480,481,482,483,484,485,486,487,488,489,490,491,492,493,494,495,496,497,498,499,500,501,502,503,504,505,506,507,508,509,510,511,512,513,514,515,516,517,518,519,520,521,522,523,524,525,526,527,528,529,530,531,532,533,534,535,536,537,538,539,540,541,542,543,544,545,546,547,548,549,550,551,552,553,554,555,556,557,558,559,560,561,562,563,564,565,566,567,568,569,570,571,572,573,574,575,576,577,578,579,580,581,582,583,584,585,586,587,588,589,590,591,592,593,594,595,596,597,598,599,600,601,602,603,604,605,606,607,608,609,610,611,612,613,614,615,616,617,618,619,620,621,622,623,624,625,626,627,628,629,630,631,632,633,634,635,636,637,638,639,640,641,642,643,644,645,646,647,648,649,650,651,652,653,654,655,656,657,658,659,660,661,662,663,664,665,666,667,668,669,670,671,672,673,674,675,676,677,678,679,680,681,682,683,684,685,686,687,688,689,690,691,692,693,694,695,696,697,698,699,700,701,702,703,704,705,706,707,708,709,710,711,712,713,714,715,716,717,718,719,720,721,722,723,724,725,726,727,728,729,730,731,732,733,734,735,736,737,738,739,740,741,742,743,744,745,746,747,748,749,750,751,752,753,754,755,756,757,758,759,760,761,762,763,764,765,766,767,768,769,770,771,772,773,774,775,776,777,778,779,780,781,782,783,784,785,786,787,788,789,790,791,792,793,794,795,796,797,798,799,800,801,802,803,804,805,806,807,808,809,810,811,812,813,814,815,816,817,818,819,820,821,822,823,824,825,826,827,828,829,830,831,832,833,834,835,836,837,838,839,840,841,842,843,844,845,846,847,848,849,850,851,852,853,854,855,856,857,858,859,860,861,862,863,864,865,866,867,868,869,870,871,872,873,874,875,876,877,878,879,880,881,882,883,884,885,886,887,888,889,890,891,892,893,894,895,896,897,898,899,900,901,902,903,904,905,906,907,908,909,910,911,912,913,914,915,916,917,918,919,920,921,922,923,924,925,926,927,928,929,930,931,932,933,934,935,936,937,938,939,940,941,942,943,944,945,946,947,948,949,950,951,952,953,954,955,956,957,958,959,960,961,962,963,964,965,966,967,968,969,970,971,972,973,974,975,976,977,978,979,980,981,982,983,984,985,986,987,988,989,990,991,992,993,994,995,996,997,998,999,1000,1001,1002,1003,1004,1005,1006,1007,1008,1009,1010,1011,1012,1013,1014,1015,1016,1017,1018,1019,1020,1021,1022,1023}; int main(int argc, char *argv[]) { int counter=0,k=0; unsigned long Access_Time[MAX_COUNT][64]={0}; int DUMMY[INDEX];// dummy array of 40 * 4KB ; //Initialize for(k=0;k<INDEX;k++) DUMMY[k]=k; //access it to check segmentation fault is happening or not for(k=0;k<INDEX;k++) DUMMY[k]+=k; // even index in random order int index[32]={4,8,16,32,54,34,62,50,26,52,30,60,46,18,36,58,42,10,20,40,6,12,24,48,22,44,14,28,56,38,2,0}; int TOTAL_RANDOM_PAGE=40; int i,PAGE[TOTAL_RANDOM_PAGE]; // PAGE will contain page no of 40 pages which will be accessed in random order to defeat prefetcher for (i=0; i<TOTAL_RANDOM_PAGE; i++) { PAGE[i] = i; } shuffle(PAGE, TOTAL_RANDOM_PAGE); // PAGE now have page no in random order FILE *fp2; int s,s1; int random_index=0,sum=0; const int *p0=&DATA[0]; for (s=0;s<64;s++) { clflush((void *)(p0+s*16)); } while(counter<MAX_COUNT) { // Find Access time for Even Index for (s=0;s<32;s++) { // Access a random index Access_Time[counter][index[s]]=probe((char *)(p0+16*index[s])); //Now, access 40 other indexes belong to other 40 4KB page shuffle(PAGE, TOTAL_RANDOM_PAGE); // random orderpage for(random_index=0;random_index<TOTAL_RANDOM_PAGE;random_index++) { DUMMY[1024*PAGE[random_index]+16*PAGE[random_index]]=2*DUMMY[1024*PAGE[random_index]+16*PAGE[random_index]]; } }// end of for loop // Flush all DATA from cache for (s1=0;s1<64;s1++) { clflush((void *)(p0+s1*16)); } counter++; }// end of while loop fp2=fopen("All_access_time.txt","a"); int index4; for(counter=0;counter<MAX_COUNT;counter++) { for (index4=0;index4<64;index4++) { if(Access_Time[counter][index4]>0 && Access_Time[counter][index4]<200) fprintf(fp2,"%d,%d,%lu\n",counter,index4,Access_Time[counter][index4]); } } return 1; } 

另一个有趣的观察是,预取的随机索引访问时间的访问时间约35-70滴答。 (请参阅示例输出)

在我的系统中,L1访问时间36-44个滴答,L2访问时间50-70个滴答,L3访问时间= 90-120个滴答。

在Intel(R)Core(TM)i3-2100 CPU @ 3.10GHz和Intel(R)Core(TM)i7-3770 CPU @ 3.40GHz上进行了实验,结果类似。

系统的内部细节很less,

 L1-D = 32KB, ways_of_associative=8 L1-I = 32KB, ways_of_associative=8 L2 = 256KB, ways_of_associative=8 L3 = 3072KB (Core-i3), ways_of_associative=12 L3 = 8192KB (Core-i7), ways_of_associative=16 Cache line size=64Bytes 

你能帮我理解为什么H / W预取器能够检测到我的随机模式吗? 我在哪里犯错误?

如何编码,以便我可以打败预取程序和h / w预取程序无法预取我的数据?

注意:在使用gcc编译使用-O0选项时,我已禁用了S / W预取程序优化。

样本输出:

 (counter,index,access_time) 30,8,56 30,18,72 30,20,52 30,28,72 30,34,72 30,36,72 30,38,72 30,40,72 30,42,72 31,8,52 31,18,56 31,20,52 31,28,72 31,34,52 31,36,72 31,38,56 31,40,72 31,42,52 31,60,56 32,8,52 32,18,72 32,20,52 32,28,52 32,34,72 32,36,52 32,38,72 32,40,52 32,42,52 32,48,52 33,8,56 33,18,72 33,20,52 33,28,72 33,34,52 33,36,72 33,38,72 33,40,52 33,42,72 34,8,72 34,18,52 34,20,72 34,28,72 34,34,72 34,36,52 34,38,76 34,40,72 34,42,76 34,60,72 

Solutions Collecting From Web of "如何在linux中打败core i3 / i7中的硬件预取器"

如果你足够勇于编写一个内核模块,你可以做你想做的事情。

作为核心CPU的几乎所有功能,可以禁用硬件预取逻辑以进行调试。

硬件预取由模型专用寄存器IA32_MISC_ENABLE (0x1a0)控制。 只需设置该寄存器的位9,预取程序就会关闭。

有关更多信息,请查阅“英特尔®64和IA-32架构软件开发人员手册”。 搜索IA32_MISC_ENABLE将使您找到正确的章节。

另外,在同一个关键字的Linux内核源码上进行搜索会得到一些结果。 它们与预取无关,但是与其他方式无关,但代码看起来像一个很好的样板,因为它显示了如何从内核读取和写入IA32_MISC_ENABLE寄存器。

如果你这样做, 双重和三重检查你在做什么 。 您不想意外地禁用热监视器。 他们也位于MISC_ENABLE以及:-)